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Skills
• Languages: Verilog, System Verilog, Julia, Python, C++, Shell scripting
• Tools: GTKWave, Linux, GIT(Version Control), Tools from Cadence/Synopsys
• Interests: Functional Verification, FPGA, Computer Architecture, VLSI, Object Oriented Programming(OOPS)
• Speaker at ECEConnect 2022: Gave a talk on software development and open-source software in the context of Electrical Engineering.
• Speaker at JuliaCon 2021: Presented my work on Javis.jl to a global community of Julia enthusiasts, developers, scientists and industry.
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